A phase change memory is a solid-state memory that comprises a material that can be switched between an amorphous structure and a crystalline structure. The structures have a different electrical resistivity, which can be translated into different bit values. Hence, during read-out of a phase change memory cell, by measuring the resistance of the cell, the bit value stored in the cell can be determined. Phase change material memories are becoming increasingly popular as they offer significant advantages in terms of cost and performance over charge storage based memory cells.
Phase change materials such as chalcogenides tend to change phase when the material reaches a certain temperature and is subsequently cooled at an appropriate speed. The amorphous phase, also referred to as the reset state, is typically formed when the material is subjected to a relatively high temperature, which will be referred to as Tam and is the melting temperature of the crystalline phase change material followed by relatively rapid quenching, whereas the crystalline phase, also referred to as the set state, is typically formed when the amorphous material is melted at a lower temperature, which will be referred to as Tcr, followed by relatively slow quenching, which will also be referred to as a cooling step in the remainder of this application.
In order to change the phase of the phase change material in a phase change memory cell, the material is typically subjected to a current such as a source-drain current that has been carefully shaped to ensure that the material is heated to the appropriate temperature. This is typically achieved by applying appropriate pulse patterns to the bit line and word line of the memory cell, with at least one of the reset pulses, i.e. one of the pulses applied when switching the memory cell to its reset state, typically having a higher voltage than the set pulses, i.e. the pulses applied when switching the memory cell to its set state, thereby ensuring that a higher current is induced through the phase change material, thus ensuring that Tam is reached.
Previously, rectangular pulse shapes have been used for both the set and reset pulses. However, as recognized in for instance U.S. Pat. No. 6,570,784, a problem that may occur in phase-change memory cells is that variations in the fabrication process and phase change material of the phase change memories can cause the actual temperature induced in the phase change memory cell to significantly deviate from the intended temperature. This is especially problematic when changing the phase of the phase change memory cell to the crystalline set state, as the phase change material may reach Tam, thereby erroneously keeping the material in its amorphous reset state if quenched sufficiently quickly, thus causing a data (bit) error in the memory cell.
In U.S. Pat. No. 6,570,784, this problem has been addressed by using a current pulse having a generally triangularly shaped or non-linearly shaped trailing portion in the programming of the set state, whereas the programming of the reset state is achieved using rectangularly shaped current pulses. The downward slope of the trailing portion of this pulse ensures that for memory cells that do reach Tam during the set programming cycle, the material can cool down and recrystallize at or near Tcr. A disadvantage of this approach is that the complexity of the pulse generation circuitry is increased, due to the fact that different voltage pulses are used to generate the different current pulses.